ASIC Verification Engineer - NTSG

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.

AMD together we advance_

THE TEAM: AMD's NTSG - Network Technologies Solutions Group is a leading provider of data center networking technology. The distributed services platform will expand AMD's data center product portfolio with a high-performance data processing unit (DPU) and software stack that are already deployed at scale across cloud and enterprise customers including Goldman Sachs, IBM Cloud, Microsoft Azure and Oracle

THE PERSON:

We are hiring a ASIC Verification Engineer to help contribute to rapidly expanding and innovative chip designs in both 7nm and 5nm process technologies. We are developing cutting-edge domain specific processors for the IAAS and smart-switch markets that leverage the P4 programming language to provide software-defined features and scale but with hard-wired performance attributes. Applications include advanced PCIe, networking, storage, and security virtualization services for both the public and private cloud markets.

THE ROLE:

In this role, you will be responsible for defining test strategies and plans, developing test benches and test cases, and debugging designs helping with micro-architecture.

You will participate in design verification methodology definition as well as contribute to design verification infrastructure that facilitates maximum re-use of components, improves productivity, and guarantees to the maximum extent possible, bug-free designs. Your work and skills will be leveraged across module-level, full chip, emulation, prototyping, silicon bring-up, manufacturing diagnostics, compilers, and shipping platform software.

KEY RESPONSIBILITIES:

With your solid knowledge and understanding of Computer Architecture you will be:

* Developing and executing test plans for Unit/IP/Subsystem/ SOC level verification
* System Verilog test bench development including stimulus, checkers, transactors/BFMs, assertions and cover points
* Identifying bugs in architecture, functionality and performance with strong overall debug and analytical skills

PREFERRED EXPERIENCE:
Languages and tools:
* UVM, System Verilog, C or C++
* System Verilog simulators and waveform debuggers
* Experience developing and executing test plans for Unit/IP/Subsystem/ SOC level verification
* Experience in System Verilog test bench development including stimulus, checkers, transactors/BFMs, assertions and cover points
* Experience identifying bugs in architecture, functionality and performance with strong overall debug and analytical skills
* Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy/DVE)
* Solid knowledge and understanding of Computer Architecture
* Excellent debugging and problem-solving skills

ACADEMIC CREDENTIALS:
BSEE or equivalent. MSEE preferred

LOCATION:
Santa Clara, CA

#LI-BW1

#LI-hybrid

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.