ASIC Engineer Staff

Juniper is a leading provider of advanced routers and switches for the internet. We keep the world connected with speed, reliability, security, and ease of use. At Juniper Silicon group, we push the boundaries of what is possible in a piece of silicon die. We build cutting edge networking chips used to build world-class routers and switches.

Bring your passion and there are no boundaries to what you can accomplish here. We are like a start-up in a big company. Year after year, our group builds the most powerful and highest density networking chips.

As part of our fast-paced chip design group, you will become an expert in building/validating high-speed ASICs. We give you opportunities to work on complex blocks where you can challenge yourself and grow. You will have a significant opportunity to interact with system design teams across geographies.

Open communications, empowerment, innovation, teamwork, and customer success are the foundations of the team. Thus, you set your own limits for learning, achievements, and rewards.

Responsibilities:

• You will utilize the latest verification methodologies like UVM to develop complex verification suites to verify advanced networking chips.
• You will start with a functional specification of a module and produce a detailed test plan to verify the module.
• You will write functional models for the module using System Verilog/C/C++ for architectural validation.
• You will build the module level test bench using System Verilog/UVM
• You will write tests according to the test plan to thoroughly verify the module. You will be responsible for making sure your module is fully functional.
• You will incorporate functional coverage to ensure all functionality is tested.
• You will work closely with logic designers to resolve bugs, with SW engineers to assist in driver code development.
• You will use state-of-the-art tools for doing formal verification, code coverage analysis, gate sims, and more.
• You will also participate in full chip/sub-system and emulation testing - which gives you exposure to the entire functionality of the chip/system.
• You get to participate in ASIC validation in the lab if you are passionate about making the chip come alive.
• You will mentor interns and new college graduates.
• On a need basis, you will build automation and enhance existing DV methodologies for improving efficiencies.
  
  Required and Desired Skills:
• Bachelor's degree required (Master's strongly desired) in Electrical Engineering or Computer Science/Engineering with 10+ years' experience.
• Strong analytical/ problem solving skills.
• Experience in constrained-random verification with methodologies such as UVM is required - Should have developed block level/full-chip test benches from scratch using system Verilog/UVM in prior work.
• Experience using emulation systems is a plus.
• Knowledge of Computer Architecture/networking protocols and machine learning through previous work is a plus but not required.
• Knowledge of Perl/Python/C/C++.
• Excellent written and verbal communications skills is necessary.
• Demonstrated leadership skills (as verification lead for subsystem or full chip in prior work) is required.

Minimum Salary: $165,600.00

Maximum Salary:$238,050.00

The pay range for this position is expected to be between $165,600.00 and $238,050.00/year; however, the base pay offered may vary depending on multiple individualized factors, including market location, job-related knowledge, skills, and experience. The total compensation package for this position also includes medical benefits, 401(k) eligibility, vacation, sick time, and parental leave. Additional details of participation in these benefit plans will be provided if an employee receives an offer of employment.

If hired, employee will be in an "at-will position" and the Company reserves the right to modify base salary (as well as any other payment or compensation program) at any time, including for reasons related to individual performance, Company or individual department/team performance, and market factors.

Juniper's pay range data is provided in accordance with local state pay transparency regulations. Juniper may post different minimum wage ranges for permanent residency petitions pursuant to US Department of Labor requirements.