Principle FPGA Product Design Engineer

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THE ROLE:

The job role will be responsible for advanced silicon technology evaluation, design enablement, product development, and manufacturing bring-up of FPGA and ASIC products from concept phase through transfer to high-volume production.

THE PERSON:

The ideal candidate must be familiar with advanced silicon technologies including manufacturing process, device physics, reliability mechanisms as well as foundry PDK support. Knowledge of 3DIC and advanced packaging technologies is must. A good understanding of FPGA product development and yield ramp-up is required. The candidate shall possess effective communication, good interpersonal skills and be able to work seamlessly with design teams, foundry partners and package/assembly vendors. Typically, the candidate will hold a degree in engineering or physical science with extensive relevant experience in the field.

KEY RESPONSIBILITIES:

• Responsible for technology definition, PPAC assessment and design-technology co-optimization (DTCO) for FPGA and ASIC products in advanced nodes (3nm, 2nm & beyond)
• Work with design and technology to accomplish robust IP & product designs
• Work with CAD & PDK teams to enable design environment and support PDK needs in advanced nodes with 3DIC technology
• Coordinate testchip design and tapeout for process and IP validation prior to NPI phase
• Responsible for product WAT analysis, performance correlation and yield analysis during NPI in collaboration with foundry and design teams
• Assist FPGA and ASIC technology roadmap exploration to meet end customer requirements

KEY QUALIFICATIONS:

• Familiar with advanced semiconductor technologies and industry roadmap including FinFET, GAA, Backside Power etc.
• Working knowledge of 3DIC advanced packaging technologies including CoWoS and SoIC
• Past experience of supporting FPGA product silicon development and NPI is required
• Strong background in development and tapeout of process and IP validation test vehicles
• Working knowledge of IP and SoC analog and digital design flows with foundry PDK support experience
• Experience with major EDA tools for device model, layout, circuit simulation, parasitic extraction, and physical verification
• Familiarity with device reliability degradation mechanisms, test methods, and lifetime modeling
• Strong analytical, problem solving, decision-making and communication skills
• Prior team leadership and management experience is a plus

ACADEMIC CREDENTIALS:

• Bachelor degree in engineering or physical science, with advanced degree (MS or PhD) strongly preferred

LOCATION:

San Jose, Ca

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Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.