R&D Engineer 1

As part of the High Frequency Measurement Center of Excellence (COE) organization, you will work with engineers across the globe to develop industryleading network analyzer platforms that enable precise RF, microwave, and millimeterwave measurements.

You will be a member of a multidisciplinary R&D team responsible for the FPGA, digital, and mixedsignal subsystems used in Keysight's network analyzers. In this role, you will contribute to the design, implementation, and validation of FPGAbased signal processing, control, and datamovement architectures that are tightly integrated with highperformance analog and RF hardware.

This position offers handson experience with real products, exposure to full product development cycles, and close collaboration with hardware, firmware, and system architects. Keysight's network analyzer products are market leaders used in aerospace, defense, wireless communications, semiconductor, and research applications worldwide.

As a successful candidate, you will:

• Contribute to the design and development of FPGAbased and digital hardware subsystems for network analyzers.
• Implement and maintain FPGA logic (RTL) for highspeed data acquisition, signal processing, control, and instrumentation functions.
• Support digital interfaces and data paths, such as ADC/DAC interfaces, highspeed serial links, PCIe, memory, and control buses.
• Work closely with analog/RF, system, and firmware engineers to define digital architectures and interfaces.
• Develop and execute FPGA simulation, verification, and hardware bringup plans.
• Support hardware debugging and validation using lab equipment such as logic analyzers, oscilloscopes, and network analyzers.
• Participate in design reviews, architecture discussions, and crosssite project meetings.
• Document FPGA designs, interfaces, and test results in accordance with Keysight development processes.
• Learn and apply Keysight quality, configuration management, and product lifecycle practices.

• BS degree (or greater) in Electrical Engineering, Computer Engineering, or a closely related field (new or recent graduates encouraged to apply).
• Academic or project experience with FPGA or digital hardware design.
• Understanding of:
  • Digital logic and RTL design (Verilog, SystemVerilog, or VHDL)
  • Clocking, resets, timing constraints, and synchronization
• Familiarity with FPGA development tools (e.g., Vivado, Quartus, or equivalent).
• Ability to work effectively in a collaborative, global R&D environment.
• Strong analytical, problemsolving, and communication skills.

• Experience with highspeed data converters (ADC/DAC) and their digital interfaces.
• Exposure to DSP concepts implemented in FPGA (e.g., filtering, decimation, FFT, calibration support).
• Familiarity with highspeed digital interfaces (PCIe, JESD204, Ethernet, LVDS, or similar).
• Basic understanding of signal integrity and hardware timing considerations.
• Internship or coop experience in FPGA, digital, or hardware engineering.